Da Qi Ren

I have over 12 years of experience in industry on computing architectures, parallel and distributed processing, and HPC software design. In details, have worked on CPU core architecture, out-of-order execution, SMT, L1/L2 cache, Server/Mobile SoC memory subsystem architecture. Mainly using C++ for performance simulator development and performance simulation. I do workload analysis including SpecCPU, Geekbench, LMBench; use perf and other profiling tools. Also do performance analysis of RTL design, debugging (Verilog/Verdi). Also done research works on high performance computing platforms, GPGPU and computational electromagnetics.